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Atomic-level polishing process implemented, achieving a new limit of 0.1nm in silicon wafer surface roughness
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2025-07-14

Atomic-level polishing process implemented, achieving a new limit of 0.1nm in silicon wafer surface roughness

Atomic-level polishing technology has made significant progress in the field of semiconductor manufacturing, successfully reducing the surface roughness of silicon wafers to a new limit of 0.1nm.

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300mm silicon wafer yield exceeds 95%! Domestic semiconductor-grade crystal growth technology achieves milestone progress
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2025-07-14

300mm silicon wafer yield exceeds 95%! Domestic semiconductor-grade crystal growth technology achieves milestone progress

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